Design-Reuse

RISC-V: The Open-Source Revolution in CPU Architecture

RISC-V is an open-source Instruction Set Architecture (ISA) that rapidly transforms the CPU design and development landscape. Unlike proprietary ISAs, RISC-V allows free access to architecture ...
EDN

RISC-V basics: The truth about custom extensions

The era of universal processor architectures is giving way to workload-specific designs optimized for performance, power, and scalability. As data-centric applications in artificial intelligence (AI), ...
Design-Reuse

RISC vs CISC: What's the Difference?

A new study comparing the Intel X86, the ARM and MIPS CPUs finds that microarchitecture is more important than instruction set architecture, RISC or CISC. If you are one of the few hardware or ...
Electronic Design

Examining the RISC-V Architecture

RISC-V is an open-source instruction set definition managed by RISC-V International. This TechXchange includes content that delves into the architecture and design of a RISC-V processor core. How did ...
Electronics Weekly

Basic building blocks for multi-processor SoCs

Ashish Dixit from Tensilica looks at multiple processor SoC design, and considers how the processor has become the basic building block The arrival of affordable multiprocessing in embedded systems ...
Bit-Tech

Soft Machines unveils VISC virtual chip architecture

A multinational late-stage startup has emerged from stealth mode with some dramatic claims for its new microprocessor architecture, VISC, including the promise of a 2-4 times gain in performance over ...
New Electronics

Open-source SystemVerilog RISC-V processor functional coverage library

Imperas Software has announced the release of the first open-source SystemVerilog RISC-V processor functional coverage library for RISC-V cores. The initial release is for RV32IMC, RV64 and other ...