CMOS technology has dominated the IC business for the last 25 years and will continue to do so for another 25 years, according to the author of CMOS Circuit Design, Layout, and Simulation. He explains ...

A layout-dependent circuit-design model from Toshiba helps boost gate density and improve cost-performance in next-generation 45-nm CMOS technology. More specifically, 45-nm CMOS gate density can be 2 ...

In recent years we have begun to see references to “RF” CMOS processes and to “RF” models for those processes. This article will explore what the real meanings of such “RF” designations are, and what ...

November 11, 2022 -- Semiwise has developed transistor SPICE models based on the GlobalFoundries (GF) 22FDX ® Platform that enable cryogenic CMOS design and verification. Using its patented ...

Julien Ryckaert at imec suggests a new approach to heterogeneous integration – instead of heterogeneous packaging, use monolithic heterogeneous on-chip integration. Ryckaert calls the approach ‘CMOS 2 ...

Advances in integrated circuit technology and fabrication have made it possible to leverage traditional CMOS fabrication processes and materials and apply them to the design of Photonic Integrated ...

Spirea AB is a Swedish fabless semiconductor company developing highly integrated low-power, low-cost radio solutions for the Wireless LAN and PAN markets. This article describes how we assembled a ...

As we all know, the back-end design of layout implementation known as integrated circuit (IC) layout — is simplistically divided into ASIC-style flow and full-custom flow. This article will try to ...

Silicon photonics is undergoing a resurgence as traditional approaches for reducing power and heat become more difficult and expensive, opening the door to a whole new set of technological challenges ...