Design-Reuse

Xilinx Announces ISE Design Suite 13.4 Further Extending 7 Series FPGA Support and Design Productivity

Latest release includes the New MicroBlaze Micro Controller System, Enhanced Debug with 2D Eye Scan and Partial Reconfiguration Support for Artix-7 and Virtex-7 XT FPGAs SAN JOSE, Calif. -- Jan. 18, ...
EDN

Xilinx Releases Industry’s First Complete Digital Front-End Design to Accelerate Development of 3GPP LTE Radio

Xilinx Releases Industry’s First Complete Digital Front-End Design to Accelerate Development of 3GPP LTE Radios for Wireless Base Stations New Virtex-5 FPGA-based reference design delivers high ...
Design-Reuse

Xilinx ISE Design Suite 12 Enables Up to 30% Dynamic Power Reduction with Intelligent Clock-Gating Technology

AMBA 4 AXI4 IP Support and Innovations in Design Preservation Combined with ISE Power Optimization to Deliver New Levels of Productivity for Virtex-6 and Spartan-6 FPGAs SAN JOSE, Calif., May 3, 2010- ...