Design-Reuse

PCIe error logging and handling on a typical SoC

In Today’s high speed systems PCI Express (PCIe-Peripheral Component Interconnect-express) has become the backbone. PCIe is a third generation high performance I/O bus used to interconnect peripheral ...
EDN

Exercise those storage devices

Data-communications equipment doesn't live in a silo. It lives in a network or other system with other devices and it most communicate with them. In other words, devices on a network or other ...
Electronic Design

What’s the Difference Between the Palladium Emulator and an FPGA for PCIe Debug?

PCI-SIG’s Peripheral Component Interconnect Express Gen5 (PCIe Gen5) is a system protocol used primarily for data transfers at high rates in systems. A transfer rate of 32 Gb/s can be achieved by PCIe ...
Semiconductor Engineering

An Overview Of CXL Mode Alternate Protocol Negotiation

The Peripheral Component Interconnect Express (PCIe) protocol has a very powerful feature called Alternate Protocol Negotiation (APN), which was introduced in the PCIe 5.0 specification. This feature ...
Electronic Design

Boost Time Synchronization Accuracy with the PCIe PTM Protocol

The need for more accurate time synchronization within a distributed system. The challenges of using synchronized time provided by the Precision Time Protocol (PTP) in application software and the ...