Semiconductor Engineering

Fast Interrupt Extension For MCU RISC-V

A technical paper titled “CV32RT: Enabling Fast Interrupt and Context Switching for RISC-V Microcontrollers” was published by researchers at ETH Zurich and University of Bologna. “Processors using the ...
Electronics Weekly

SiFive has licenses C++ library for Risc-V

IC intellectual property company SiFive has licensed Segger’s emRun++ C++ library for Risc-V, a library optimised for GCC/LLVM-based tool chains and embedded systems, based on the emRun and emFloat ...
Semiconductor Engineering

RISC-V Verification: The 5 Levels Of Simulation-Based Processor Hardware DV

The RISC-V open standard ISA (Instruction Set Architecture) offers developers the opportunity to configure the features and functions of a custom processor to uniquely address their target end ...
Design-Reuse

Intel launches compact RISC-V Nios processor core

Intel has launched a new, compact soft core for its FPGA devices based on the RISC-V open instruction set architecture. Opening up the Simics FPGA simulation platform Backing RISC-V for the Nios FPGA ...
Business Wire

SiFive Announces New High-performance RISC-V Datacenter Processor for Demanding AI Workloads

SANTA CLARA, Calif.--(BUSINESS WIRE)--Today SiFive, Inc., the gold standard for RISC-V computing, announced its new SiFive Performance P870-D datacenter processor to meet customer requirements for ...
Electronic Design

RISC-V RVA23—A Major Milestone

The 2024 RISC-V Summit North America marked a significant milestone for the RISC-V community with the ratification of the RVA23 Profile. This event signifies a major step forward in the evolution of ...