Design-Reuse

Synopsys Announces FPGA Synthesis Support for Xilinx's Newest ISE Design Suite 13

Designers using Synopsys' Synplify Pro® and Synplify® Premier FPGA synthesis software, in conjunction with Xilinx's latest ISE Design Suite 13, can achieve high design performance for Virtex®-7, ...
Design-Reuse

Cadence Expands C-to-Silicon Compiler with High-level Synthesis Support for Altera and Xilinx FPGAs

Integration Enables High-level Synthesis of Mixed Control/Datapath Designs and Incremental Synthesis for FPGAs SAN JOSE, Calif., and TOKYO, 20 Jan 2009-- Cadence Design Systems, Inc. (NASDAQ: CDNS), ...
Electronics Weekly

In FPGA design timing is everything, says Synopsys

When your FPGA design fails to meet timing performance objectives, the cause may not be obvious. The solution lies not only in the FPGA implementation tools’ talent in optimising the design to meet ...
Electronics Weekly

Xilinx acquires ESL firm to make FPGAs easier to use

Xilinx plans to add System C high level design to its 6- and 7-series FPGA families with the acquisition of design tool firm AutoESL Design Technologies. According to Tom Feist, a senior marketing ...