EDN

Dual PLL Spread Spectrum Clock Generator

The AD9577 provides a multioutput clock generator function along with two on-chip phase-locked loop cores, PLL1 and PLL2, optimized for network clocking applications. The PLL designs are based on ...
Electronics Weekly

Analogue or digital in PLL design

The performance of analogue phase-locked loops (PLLs) has steadily improved with operating frequencies extending to 8GHz and beyond. Recently, digital PLLs based on direct digital synthesis (DDS) have ...
EDN

Single Clock Generator with Integrated PLL

The AK8110 is a single clock generator IC with an integrated PLL. It can generate either a 36.0 MHz or 49.5 MHz clock from a 27 MHz master clock input frequency.The AK8110 is a single clock generator ...
New Electronics

SiLabs introduces first 4-PLL clock ICs

Silicon Laboratories has introduced what it claims are the industry's highest performance and most integrated clock ICs, designed to address the complex timing requirements of high speed optical ...
Design-Reuse

TSMC PLL _ Clock Generator / Clock Synthesizer / Phase-Locked Loop, (Fractional / Integer)

The ARKCHIPS PLL is a versatile and stable general-purpose frequency synthesizer with phase synchronization(de-skew) Phase-Locked Loop (PLL) : feedb ...
The Engineer

Power-Up Phase Determinism Using Multichip Synchronisation Features in Integrated Wideband DACs and ADCs

A block diagram of the system used for this test is shown in Figure 1 and consists of four integrated DAC/ADC/DSP ICs that each consist of four 12GSPS DACs, four 4GSPS ADCs, and 12 digital ...