The folks at Altera have unveiled their Quartus II software version 8.1 for CPLD, FPGA, and HardCopy ASIC designs. Based on internal benchmarks, the folks at Altera claim high-density FPGA compile ...

Integrated IEEE 754-compliant, floating-point DSP blocks in Arria 10 FPGAs and SoCs deliver unparalleled levels of DSP performance, designer productivity and logic efficiency. The Quartus II software ...

Altera has announced the release of the latest version of its Quartus II development software for CPLD, FPGA and HardCopy Asic designs. Version 10.0 of the software includes support for Altera’s 28-nm ...

Development Software Enables Stratix III FPGAs to Achieve 3X Faster Compile Times Compared to Competing High-End 65-nm Devices “More than 15 years experience using the largest and most complex FPGAs ...

This tutorial shows you how to create the hardware equivalent of “Hello World”: a blinking LED. This is a simple exercise to get you started using the Intel® Quartus® software for FPGA development.

Stratix II Offers Designers Over 65 Percent More Density than Competitive Products San Jose, Calif., February 9, 2003—Altera Corporation (NASDAQ: ALTR) today announced that it has commenced ...

SAN JOSE, Calif.--(BUSINESS WIRE)--Altera Corporation (NASDAQ:ALTR) today announced the release of Quartus ® II software version 9.1, the industry's number-one software in performance and productivity ...

Mouser is now offering the latest version of Altera's Quartus II software platform. Version 13.0 offers design entry, simulation, synthesis, place and route, and verification for cpld, fpga, SoC and ...